Mentor Graphics Delivers Complete FPGA Design Flow Resulting in Increased Productivity with Xilinx Latest ISE Software

WILSONVILLE, Ore.--(BUSINESS WIRE)--Sept. 9, 2003--Mentor Graphics Corp. (Nasdaq:MENT) today announced a collaboration with Xilinx, Inc. to provide seamless operation between its FPGA Advantage(TM) design environment and Xilinx's recently announced Integrated Software Environment 6.1i (ISE). FPGA Advantage, Mentor's FPGA design environment incorporates the Mentor Graphics HDL Designer Series(TM) design management environment, the ModelSim(R) simulator, the LeonardoSpectrum(TM) and Precision(TM) Synthesis tools. Integrated with Xilinx's new ISE 6.1i tools, FPGA Advantage delivers a complete FPGA flow that redefines the standard for productivity in programmable logic design software.

Both Mentor and Xilinx are committed to providing the most complete, intuitive design solution available for FPGA design. Through their continued technology collaboration, the two companies provide designers with a comprehensive field programmable system-on-chip design environment that enhances productivity, shortens design time and reduces overall development costs. The enhanced FPGA design flow includes hardware and software design creation and verification environments with synthesis, design management, timing analysis and place and route capabilities. This design suite, coupled with Xilinx flagship Virtex-II Pro(TM) Platform FPGAs and 90nm/300mm Spartan-3(TM) low-cost FPGAs, creates the most cost-effective hardware/software solution available in logic design today.

"Mentor Graphics, as the leading vendor of FPGA design software, understands the difficulties of today's complex FPGAs. With the increasing number of complex design starts, designers need an environment that allows them to rapidly create and debug a design, and achieve timing closure. Mentor provides customers superior point tools as well as a complete, integrated solution for FPGA design that answer this challenge," said Simon Bloch, general manager of Mentor Graphics design creation and synthesis division. "With close cooperation between Xilinx and Mentor, our ISE 6.1i integration enables customers to take advantage of both the power of the FPGA Advantage design environment and key ISE's features, such as the Xilinx place and route, timing analyzer, and power analysis features. This integration reduces learning curves and accelerates time to productivity."

"Our continued collaboration enables us to support a complete front-to-back design flow that accelerates the creation of FPGA designs and yields substantial advantages for customers," said Rich Sevcik, senior vice president of FPGA Products at Xilinx. "Through our collaboration efforts, our mutual customers have access to comprehensive EDA and FPGA design solutions, alleviating many of the bottlenecks that otherwise slow design and verification. Because FPGA Advantage and ISE 6.1i are both user-friendly, intuitive environments, designers get up and running quickly and easily and can immediately begin designing with Xilinx devices."

FPGA Advantage and ISE 6.1 Integration

With FPGA Advantage, Mentor Graphics provides its industry-leading solutions for FPGA design, including HDL Designer Series for design creation, documentation and management, ModelSim for VHDL and Verilog RTL and gate level simulation and Precision Synthesis for FPGA synthesis and design analysis integrated into a complete flow for designers.

HDL Designer series provides both graphical and textual design creation that takes full advantage of Xilinx CoreGen system generators and CoreConnect cores for fast design creation and management. In addition, with Mentor's new FPGA Boardlink, HDL Designer is tightly integrated to Mentor's PCB design tools, passing pin placement and schematic symbol information back and forth to shorten both the PCB and FPGA design processes.

The Xilinx ISE environment, has also been tightly integrated into Mentor's new Precision Synthesis environment, enabling designers to run the place and route flow from within its intuitive user interface. This includes back annotating the resulting timing and placement files to enable designers to take full advantage of Precision's advanced incremental timing analysis and re-synthesis features.

Mentor's FPGA Advantage Solution

The FPGA Advantage environment maximizes the performance of both existing programmable logic devices (PLD) and next-generation, multi-million gate field programmable system-on-chip (FPSoC) devices. FPGA Advantage is the center of a company-wide initiative to provide the most comprehensive tool suite for FPGA design. Mentor's FPGA strategy includes solutions for embedded processor design, hardware software co-design, design creation ,verification ,implementation, system integration, intellectual property cores, and PCB design solutions providing the most comprehensive support for FPGA design. Mentor Graphics FPGA design solutions support all Xilinx devices.

About ISE 6.1i

With over 31 percent better performance and up to 60 percent cost savings over competing solutions, Xilinx ISE 6.1i is the world's highest performance software for programmable logic. ISE 6.1i sets the industry standard for ease-of-use, solves traditional design bottlenecks to speed design and verification, and dramatically reduces customer's overall design cycle time and design costs. The software suite, coupled with Xilinx Virtex-II Pro and Spartan-3 FPGAs offering breakthrough price points, device densities, and performance, offer designers an ideal ASIC replacement solution. For information about ISE 6.1i, visit www.xilinx.com/ise.

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $650 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Mentor Graphics and ModelSim are registered trademarks of Mentor Graphics Corporation. Precision, HDL Designer Series, LeonardoSpectrum, FPGA Boardlink are trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.

CONTACT: Weber Shandwick
             Jeremiah Glodoveza, 310-407-6525
             jglodoveza@webershandwick.com
             or
             Mentor Graphics
             Cynthia Hammond, 408-487-7426
             cynthia_hammond@mentor.com